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    High-Level FPGA-Programmierung mit automatisch generierten Netzwerken von Automaten
    Due to the increasing number of gates and the integration of hard-wired elements within Field Programmable Gate Arrays (FPGAs), high-level language programmability and tools become more necessary. In this thesis the TransC language is introduced in which programs are coded as networks of finite state machines. Concepts for concurrency,interprocess communication and synchronization are developed and optimization techniques are described. Furthermore, a compiler is implemented that generates efficient VHDL code.
    Publicationtype: Doctoral Thesis
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