SMART EIS Sensor Interface – Cadence Virtuoso Design Files & MATLAB/Simulink Analysis Data

This dataset supports the publication "Towards Smart Sensor Particles for Fluidized Bed Granulators Using Electrical Impedance Spectroscopy: A Conceptual Design" (submitted to ACS Sensors). It contains two categories of data: (1) Cadence Virtuoso design libraries for the SMARTe_V2 custom ASIC, implemented in X-FAB 180 nm CMOS technology (xh018), comprising a transimpedance amplifier, fully differential difference amplifier, passive switching mixer, and top-level pad frame integration; (2) MATLAB scripts and Simulink models for system-level analysis of the lock-in amplifier-based EIS front-end, including optimal component sizing, loop gain analysis, Bode characterization, and post-processing of experimental impedance measurements from the dataset cited hereby. The data is intended to support reproducibility and reuse of the presented EIS sensor interface design.