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Integrated circuit with memristor emulator array and neuron circuits for biologically inspired neuromorphic pattern recognition
Citation Link: https://doi.org/10.15480/882.2018
Publikationstyp
Journal Article
Publikationsdatum
2017-04-27
Sprache
English
Author
Mendoza Ponce, Pablo
Schroeder, Dietmar
Institut
TORE-URI
Enthalten in
Volume
26
Issue
11
Start Page
1750183
Citation
Journal of Circuits, Systems and Computers 11 (26): 1750183 (2017)
Publisher DOI
Scopus ID
Publisher
World Scientific Publishing
This paper details an application-specific integrated circuit (ASIC) with an array of switched-resistor-based memristors (resistor with memory) and integrate & fire (I & F) neuron circuits for the development of memristor-based pattern recognition. Since real memristors are not commercially available, a compact memristor emulator is needed for device study. The designed ASIC has five memristor emulators with one having a conductance range from 4.88ns to 4.99μs (200kOhm) to 204.8MOhm)) and other four having conductance ranging from 195ns to 190μs (5.2kOhm) to 5.12MOhm)). Signal processing has been planned to be off-chip to get the freedom of programmability of a wide range of memristive behavior. This paper introduces the memristor emulator and the realization of synapse functionalities used in neuromorphic circuits such as long term potentiation (LTP), Long Term depression (LTD) and synaptic plasticity. The ASIC has two I & F neuron circuits which are intended to be used in conjunction with memristors in a multiple chip network for pattern recognition. This paper explains the memristor emulator, I & F neuron circuit and a respective neuromorphic system for pattern recognition simulated in LTspice. The ASIC has been fabricated in AMS 350nm process.
Schlagworte
ASIC
emulator
CMOS
LTD
LTP
memristor
neuron
synaptic plasticity
pattern recognition
DDC Class
570: Biowissenschaften, Biologie
More Funding Information
Deutsche Forschungsgemeinschaft (DFG)
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