Publisher DOI: 10.1109/ISEMC.2016.7571754
Title: Design space exploration for printed circuit board vias using polynomial chaos expansion
Language: English
Authors: Preibisch, Jan 
Triverio, Piero 
Schuster, Christian 
Keywords: design space exploration;high-speed digital interconnects;physics-based via (PBV) model;polynomial chaos expansion (PCE);printed circuit board (PCB)
Issue Date: 19-Sep-2016
Publisher: IEEE
Source: IEEE International Symposium on Electromagnetic Compatibility (2016-September): 7571754, 812-817 (2016-09-19)
Abstract (english): This work discusses how the Williamson equivalent circuit for the modeling of via transitions is augmented using the polynomial chaos expansion (PCE) method to take into account stochastic variations of model parameters. In addition, it is shown how the PCE can be applied in combination with Monte-Carlo (MC) sampling to conduct an efficient design space analysis. The physics-based via (PBV) model is used to efficiently model multilayer via interconnects by concatenating equivalent circuit models representing certain geometric sections of the interconnect. These equivalent circuits are expanded with respect to the stochastic model parameters by means of PCE and concatenated to derive an augmented model of the whole interconnect. From this representation, stochastic scattering parameters are extracted. Numerical examples verify the method and the computational advantages over MC sampling. The method provides a fast and comprehensive approach to design space exploration and variability assessment in the design stage of via interconnects. The presented approach is not limited to via models and can be applied to various microwave structures in a similar way.
Conference: 2016 IEEE International Symposium on Electromagnetic Compatibility (EMC 2016) 
URI: http://hdl.handle.net/11420/5248
ISBN: 978-1-5090-1442-2
ISSN: 1077-4076
Institute: Theoretische Elektrotechnik E-18 
Type: InProceedings (Aufsatz / Paper einer Konferenz etc.)
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