Najafi, ArdalanArdalanNajafiFey, GoerschwinGoerschwinFeyGarcia-Ortiz, AlbertoAlbertoGarcia-Ortiz2026-08-172026-08-172026-0615th International Conference on Modern Circuits and Systems Technologies, MOCAST 2026979-8-3195-1875-0https://hdl.handle.net/11420/64409Approximate computing reduces power and improves performance in error-tolerant applications, but testing remains difficult. Traditional fault models are too strict, underscoring the need for accurate prediction of how stuck-at errors, i.e., the effect of stuck-at faults, affect application-level quality. This paper introduces a high-level model for analyzing the impact of stuck-at errors in approximate multipliers, a highly relevant building block in data processing. In particular, the paper proposes decomposing the total error in the defective approximate circuit into approximate and stuck-at errors. The approximate error is known analytically due to the construction of the multiplier. However, the effect of stuck-at faults depends on the bit probabilities and the arithmetic effect of the node on the multiplier output.The high accuracy of the approach is demonstrated by precise gate-level simulations of different truncated multipliers implemented in 40-nm technology.enApproximate ComputingManufacturing TestStuck-at Fault ModelTruncate MultiplierTechnology::621: Applied Physics::621.3: Electrical Engineering, Electronic Engineering::621.38: Electronics, Communications EngineeringTechnology::621: Applied Physics::621.3: Electrical Engineering, Electronic EngineeringComputer Science, Information and General Works::004: Computer SciencesHigh-level modeling of stuck-at faults in approximate multipliers for enhanced test qualityConference Paper10.1109/MOCAST70204.2026.11626490