Lühnen, Tim JuliusTim JuliusLühnenTripathy, DevashreeDevashreeTripathyKulau, UlfUlfKulauLal, SohanSohanLal2026-09-162026-09-16202630th Annual IEEE High Performance Extreme Computing Conference, HPEC 2026https://hdl.handle.net/11420/64844GPU analytical performance models enable rapid design space exploration, but their accuracy depends heavily on the cycle-level simulators used for calibration. Existing tools such as GCStack and GCScaler are calibrated using Accel-Sim, whose execution pipeline is based on the NVIDIA Tesla architecture from 2006, featuring operand collector units, hardware scoreboards, and a Greedy-Then-Oldest warp scheduler. Recent reverse engineering studies have shown that modern NVIDIA GPUs eliminate operand collectors in favor of compiler-guided dependency management and adopt a Greedy-Then-Youngest warp scheduling policy. Although the simulator can still produce reasonable overall cycle counts, it often misattributes the underlying stalls in its CPI stacks and cache statistics. These inaccuracies are then passed onto any analytical model calibrated using them. In this paper, we revisit the calibration process used by analytical GPU performance models. We develop GCStack+, which generates CPI stacks and cache statistics using a simulator that reflects modern NVIDIA GPU microarchitecture, and GCScaler+, which uses these calibration inputs for performance prediction. The framework also adds support for Blackwell-generation instruction set, a protobuf-based trace format, and compiler-guided warp scheduling. Validated against an NVIDIA RTX 5070 (Blackwell) across nine Rodinia benchmarks, GCScaler+ reduces the geometric mean cycle prediction error from 18.2% (GCScaler) to 12.1%, at a 10.3× faster runtime than the simulator used during calibration.enhttp://rightsstatements.org/vocab/InC/1.0/CUDAComputer Science, Information and General Works::004: Computer SciencesConference Paper10.15480/882.18411