Sell, BernhardBernhardSellAvellán Hampe, AlejandroAlejandroAvellán HampeKrautschneider, WolfgangWolfgangKrautschneider2024-06-212024-06-212002-03-01IEEE Transactions on Device and Materials Reliability 2 (1): 9-12 (2002)https://hdl.handle.net/11420/48004A new simple method of measuring capacitance-voltage characteristics of MOS devices is presented. Proceeding from the charge-based capacitance measurement technique suggested recently, a compact test structure with high resolution has been developed, which only requires measurement of dc quantities. The method was tested on a 0.6-μm CMOS process with small and large area capacitors and compared to well-known high-frequency capacitance-voltage results. Beside using a reference structure, a second means of extracting parasitic effects is demonstrated for small structures. The test structure allows measurements in a wide frequency range with high accuracy and low noise contribution at small capacitance levels. © 2002 IEEE.en1530-438820021912IEEELow-level capacitanceMeasurement techniqueTest structureTechnology::621: Applied Physics::621.3: Electrical Engineering, Electronic EngineeringJournal Article10.1109/TDMR.2002.1014667Journal Article