Ghosh, ProkashProkashGhoshKumar, GauravGauravKumarLal, SohanSohanLalAhlawat, SatyadevSatyadevAhlawatVirendra Singh2025-12-162025-12-162025-09IEEE 38th International System-on-Chip Conference, SOCC 2025https://hdl.handle.net/11420/60238Main memory is a critical component for storing computational data across various applications, including highly sensitive information such as banking transactions, encryption keys, and authentication credentials. However, memory systems are susceptible to side-channel attacks, making it imperative to implement effective countermeasures against unauthorized data extraction. Additionally, counterfeit memory controllers and memory devices pose a significant security risk, as they can facilitate data leakage even in the presence of conventional encryption mechanisms. Traditional security solutions, such as AES encryption integrated into memory controllers, provide strong cryptographic protection; however, they introduce substantial latency and area overhead. This paper presents a novel security countermeasure that ensures secure communication between the memory controller and the memory device by employing XOR-based encryption and decryption at both ends. The proposed technique remains secure even in the presence of unauthenticated memory components, preventing unauthorized data access. Experimental evaluations demonstrate that the proposed approach achieves a high level of security (2512) while significantly reducing area overhead and incurring no additional access latency.enMemory disclosure attacksCold boot attacksDMA attacksDRAMLFSRWarm boot attacksComputer Science, Information and General Works::004: Computer SciencesConference Paper10.1109/socc66126.2025.11235448Conference Paper