Dietrich, ChristianChristianDietrichSchmider, AchimAchimSchmiderPusz, OskarOskarPuszPayá-Vayá, GuillermoGuillermoPayá-VayáLohmann, DanielDanielLohmann2021-04-122021-04-122018Annual Design Automation Conference 2018 (DAC 2018)http://hdl.handle.net/11420/9254With shrinking structure sizes, soft-error mitigation has become a major challenge in the design and certification of safety-critical embedded systems. Their robustness is quantified by extensive fault-injection campaigns, which on hardware level can nevertheless cover only a tiny part of the fault space. We suggest Fault-Masking Terms (MATEs) to effectively prune the fault space for gate-level fault injection campaigns by using the (software-induced) hardware state to dynamically cut off benign faults. Our tool applied to an AVR core and a size-optimized MSP430 implementation shows that up to 21 percent of all SEUs on flip-flop level are masked within one clock cycle.enCross-Layer Fault-Space Pruning for Hardware-Assisted Fault InjectionConference Paper10.1145/3195970.3196019Other