Akash, Kowshic A.Kowshic A.AkashWulf, TobiasTobiasWulfValentin, TorstenTorstenValentinGeist, AlexanderAlexanderGeistKulau, UlfUlfKulauJose, JohnJohnJoseLal, SohanSohanLal2025-03-312025-03-31202526th IEEE Latin-American Test Symposium, LATS 2025https://hdl.handle.net/11420/54591In the post-silicon validation process, various functionalities and boundaries of a system-on-chip (SoC) are tested, generating a large amount of data in the form of log files, trace data, and oscilloscope images. Log files provide essential information regarding a test run, such as test setup, while trace files offer insights into internal register statuses and sweep parameters like voltage, frequency, and temperature. Manually analyzing and debugging these files is time-consuming, inefficient, costly, and prone to errors. To address these challenges, we propose an AI-powered approach to automatically extract critical log messages from extensive datasets, generating concise log files with only the most pivotal information. Our method utilizes a multi-class Long Short Term Memory (LSTM) neural network. Our primary focus is to minimize false negatives (high recall) to ensure that critical anomalies are not overlooked, thus delivering more reliable SoCs. Simultaneously, we aim to minimize false positives (high precision) to reduce manual debugging efforts. Our proposed method achieves high recall/precision of 94%/99% for normal, 99%/99% for information, 92%/64% for error, and 98%/88% for warning log categories. Additionally, for outlier detection in trace data, we propose an unsupervised method based on Isolation Forest, which achieves high recall/precision of 95%/100% and 92%/73% for anomalous data points across two distinct datasets, and nearly 100% for normal data points.enhttp://rightsstatements.org/vocab/InC/1.0/Post-silicon validationAnomaly detectionMachine learningLog extractionTrace outlier detectionTechnology::621: Applied Physics::621.3: Electrical Engineering, Electronic EngineeringCase Study: AI-Driven Log Extraction and Trace Outlier Detection for Efficient Post-Silicon ValidationConference Paperhttps://doi.org/10.15480/882.1487010.15480/882.14870Conference Paper