Ranjan, RajeevRajeevRanjanKyrmanidis, AlexandrosAlexandrosKyrmanidisHellweg, Wolf LukasWolf LukasHellwegMendoza Ponce, PabloPabloMendoza PonceAbu Saleh, LaitLaitAbu SalehSchröder, DietmarDietmarSchröderKrautschneider, WolfgangWolfgangKrautschneider2024-05-172024-05-172016International Conference on Telecommunications and Signal Processing, TSP: 7760875 (2016-11-28)978-1-5090-1288-6978-1-5090-1289-3978-1-5090-1287-9https://hdl.handle.net/11420/47553This paper details an array of switch resistor based memristor emulators with integrate & fire based neuron ASIC for the development of memristor based pattern recognition. The designed ASIC has 4 memristor emulators with a conductance range from 195 nS to 190 uS; processing has been planned to be off-chip to get the freedom of programmability of any function in ASIC. The ASIC has 2 integrate and fire (I & F) neuron circuits which are planned to be used in conjunction with memristors in a large multiple chip network for pattern recognition. This paper explains the memristor emulator, I & F neurons and an algorithm of pattern recognition simulated in Ltspice. The ASIC has been fabricated in AMS 350nm process.enASICEmulatorMemristorNeuronPattern recognitionTechnology::621: Applied Physics::621.3: Electrical Engineering, Electronic EngineeringConference Paper10.1109/TSP.2016.7760875Conference Paper