Tomasik, Jakob M.Jakob M.TomasikGaljan, WjatscheslawWjatscheslawGaljanHafkemeyer, Kristian M.Kristian M.HafkemeyerSchröder, DietmarDietmarSchröderKrautschneider, WolfgangWolfgangKrautschneider2023-03-032023-03-032011BIODEVICES 2011 : proceedings of the International Conference on Biomedical Electronics and Devices ; Rome, Italy, January 26 - 29, 2011: 36-45 (2011)http://hdl.handle.net/11420/14940A CMOS configurable system-on-chip (SoC) for biomedical signal acquisition is described. The SoC is composed of 10 channels, each channel including a programmable analog front-end (AFE) and a 20 bit analog-to-digital converter (ADC). The digitized signals are read out via a high-speed serial communication bus. The AFE includes a common-mode rejection ratio (CMRR) calibration circuitry resulting in a CMRR of more than 80 dB and an active DC-suppression circuitry giving the DC-coupled instrumentation amplifier the possibility to tolerate DC-offsets of up to ± 1 V for a power supply voltage of 3.3 V. In low-noise mode the AFE achieves an input referred noise of less than 50 nVrms for EEG application (0.5-70 Hz) and the power consumption of a channel including AFE and ADC is less than 5 mW in low-power mode. A prototype has been fabricated in a 0.35 μm CMOS process.enBiomedical signalsCMRR-calibrationConfigurableDC-suppressionLow-noiseLow-powerSoCBiowissenschaften, BiologieConference PaperOther