Fischer, ThiloThiloFischerFalk, HeikoHeikoFalk2025-07-032025-07-032025-0531st IEEE Real-Time and Embedded Technology and Applications Symposium, RTAS 2025979-8-3315-4340-2979-8-3315-4341-9https://hdl.handle.net/11420/56083We present an optimization technique to improve system schedulability using selective cache bypassing. By allocating parts of the application to uncached memory sections during compilation, context-switching costs and intra-task cache interference are reduced, leading to improved schedulability. We compare the performance of simulated annealing and the strength pareto evolutionary algorithm (SPEA) for the optimization problem. Our evaluation demonstrates an increase in schedulability by up to 20 percentage points using SPEA.enCosts | Simulated annealing | Interference | Evolutionary computation | Real-time systems | OptimizationTechnology::600: TechnologyConference Paper10.1109/RTAS65571.2025.00015Conference Paper