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    Item type:Publication, Access status: without files ,
    Microparticle transfer onto pixel electrodes of 45 μm pitch on HV-CMOS chips - Simulation and experiment
    (2011-12-01)
    Wagner, J.
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    König, K.
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    Foertsch, Tobias C.
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    Löffler, F.
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    Fernandez, S.
    Spatially selective deposition of electrically charged microparticles onto integrated circuits that generate electrical fields in programmable patterns using electrodes on their surface was previously limited to a pixel pitch of 100 μm. Now, we demonstrate spatially selective deposition onto pixels of 45 μm pitch in experiments on a test chip allowing arbitrary patterns, but being of limited size and of fixed characteristics, complemented by COMSOL simulations. Experiments on a prototype high voltage CMOS chip demonstrate the feasibility of miniaturisation in the first place, imply simulations of interest that cannot be tested experimentally and, conversely, complement the simplified simulation models by reality checks. Using COMSOL for the optimisation of the setup parameters, particles of decreasing average diameter in a number of aerosol and electrical field geometries are simulated with particular attention to minimising contamination (deposition of particles on undesirable locations). Combining these results, the average particle diameter is decreased from 10 μm to less than 3 μm and the deposition voltage is reduced from 100 V to 30 V, when using pixels with a pitch of 45 μm. Optimising these parameters allows for more than quadrupling the spot density compared to the previous chip, on which combinatorial particle deposition with minimal contamination is achieved. Peptide arrays, having been previously shown to be a major application for this method, benefit in particular, as the increase in density from 10,000 pixels/cm<sup>2</sup> to approximately 50,000 pixels/cm<sup>2</sup> promises a significant decrease in cost-per-peptide and amount of test specimens required.
    Publicationtype: Journal Article
      7
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    Item type:Publication, Access status: without files ,
    Programmable high voltage CMOS chips for particle-based high-density combinatorial peptide synthesis
    (2010-06-03)
    König, K.
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    Block, I.
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    Nesterov-Mueller, Alexander
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    Torralba, G.
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    Fernandez, S.
    We built high voltage complementary metal oxide semiconductor (CMOS) chips that generate electrical fields on their surface, such that electrically charged microparticles (diameter 10-20 μm on average) can be addressed on distinct pixel electrodes according to arbitrary field patterns. Each pixel contains a memory cell in canonical low-voltage CMOS-technology controlling a high voltage (30-100 V) potential area on the top metal layer. Particle transfer with minimal contaminations in less than 10 s for a complete chip was observed for pixels of 100 μm × 100 μm down to 65 μm × 65 μm. This allows a new way to create surface modifications on top of CMOS chips without need for additional masks or stamps. Using suitable particles, a chemically modified chip surface, and compatible chemistry, this method can be utilized for self-aligned high-density biopolymer arrays, e.g., peptide arrays. Transfer of microparticles loaded with amino acids for combinatorial peptide synthesis is demonstrated. Successful synthesis of different peptides (octamers) was proven by immunostaining. Based on results obtained by a chip containing pixel areas of different characteristics, a chip for biological applications with 16,384 pixels (10,000 pixel/cm<sup>2</sup>) was built. Good homogeneity of peptide synthesis over the chip area was verified by immunostaining. © 2010 Elsevier B.V. All rights reserved.
    Publicationtype: Journal Article
      7