TUHH Open Research
 

Auto-generating ageing self-tests with hardware in the loop for commercial microcontrollers

Citation
31st IEEE European Test Symposium, ETS 2026
Contribution to Conference
31st IEEE European Test Symposium, ETS 2026  
Publisher DOI
10.1109/ETS69887.2026.11591921
Scopus ID
2-s2.0-105045260283
Publisher
IEEE
ISBN of container
979-8-3195-1764-7
979-8-3195-1763-0
Microcontrollers in critical systems require monitoring of hardware ageing to avoid unexpected malfunctioning. We previously introduced a deployable timing-based method with self-tests for ageing monitoring in commercial microcontrollers that relies solely on user-level information. While effective, manually constructing computing payloads for system-level tests can limit scaling and coverage of hardware-specific critical paths or subsystems. In this paper, we complement our technique with an automated generation of the self-test firmware. We explore several approaches for generation using hardware in the loop (HiL) evaluation on commercial microcontrollers, including a random generation and evolutionary strategies. In the evolutionary approach, we investigate two mutation mechanisms: random selection, and contextual bandits. Our evaluations on real hardware and a surrogate model show the impact of evaluation budget and algorithm selection on the effectiveness of automatic self-test generation. Results reveal that random generation is well suited to reduced HiL explorations, while evolutionary strategies benefit from extended evaluations. Our Hil-based technique is able to produce firmwares with up to double the degradation sensitivity as the functional tests provided by the vendor.
Subjects
Evolutionary strategy
System-level testing
Test generation
DDC Class
004: Computer Sciences