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Hybrid receive combining for scalable cell-free massive MIMO with multiple CPUs and latency-constrained midhaul links
Citation Link: https://doi.org/10.15480/882.16053
Publikationstyp
Conference Paper
Date Issued
2025-12
Sprache
English
TORE-DOI
Start Page
3795
End Page
3800
Citation
IEEE Global Communications Conference, GLOBECOM 2025
Contribution to Conference
Scopus ID
Publisher
IEEE
Peer Reviewed
true
We propose a new way of operating a cell-free massive multiple-input multiple-output (MIMO) system with multiple central processing units (CPUs). In scalable cell-free massive MIMO systems, each user equipment (UE) is served by a cluster of access points (APs). The required coordination of the APs is often modeled to be done at a single cloud CPU, but in practice this cloud CPU consists of many physical entities which can be distributed over a large geographical area. Contrary to other works, in this work we explicitly model the cloud CPU as multiple physical CPUs, where each AP is connected to one of these CPUs via a low-latency fronthaul link. The CPUs are connected via midhaul links which may have a much higher latency. Hence, extensive cooperation between APs connected to the same CPU is possible while cooperation between APs connected to different CPUs is limited. We outline a joint initial access, pilot assignment, and clustering procedure in such a network. Further, we propose a new hybrid receive combining approach that takes advantage of this structure and allows for a scalable implementation of the system. We compare the performance of our proposed hybrid cell-free system with multiple CPUs to both the idealized centralized cloud CPU version and to the fully distributed cell-free system. Our results show that the proposed system can achieve a performance close to the idealized cloud CPU system while being practically feasible. Furthermore, our hybrid approach substantially outperforms a cellular Distributed Antenna System (DAS) with no CPU cooperation.
Subjects
5G
6G
cell-free massive MIMO
uplink operation
scalable implementation
multiple CPUs
receive combining
DDC Class
621.38: Electronics, Communications Engineering
Publisher‘s Creditline
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