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  4. Progress in representation and validation of physics-based via models
 
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Progress in representation and validation of physics-based via models

Publikationstyp
Conference Paper
Date Issued
2007
Sprache
English
Author(s)
Schuster, Christian  
Theoretische Elektrotechnik E-18  
Selli, Giuseppe
Kwark, Young Hoon  
Ritter, Mark B.
Drewniak, James L.
TORE-URI
https://hdl.handle.net/11420/49266
Start Page
145
End Page
148
Article Number
4512234
Citation
11th IEEE Workshop on Signal Propagation on Interconnects (SPI 2007)
Contribution to Conference
11th IEEE Workshop on Signal Propagation on Interconnects, SPI 2007  
Publisher DOI
10.1109/SPI.2007.4512234
Scopus ID
2-s2.0-69249234618
Publisher
IEEE
ISBN
0-7803-7051-1
978-0-7803-7051-7
1-4244-1223-4
978-1-4244-1223-5
Vias in printed circuit boards and chip packages are known to have significant detrimental impact on signal and power integrity in high-speed communication systems. Recently, concise equivalent circuit models for vias in multilayer configurations have been explored by the authors. The models accurately reflect the important physical properties of vias, since the topology utilized has a one-to-one correlation to the geometrical structure and the dimensions of the via. In this paper, the proposed physics-based via models are extended to include the interaction between two signal vias and a signal via plus a reference (ground) via. The models were then compared to experimental data obtained from several structures laid out on a 16-layer printed circuit board. The measurements performed using a 4-port vector network analyzer and the high performance recessed probe launching technique evidenced good correlation to 20 GHz and beyond.
DDC Class
621.3: Electrical Engineering, Electronic Engineering
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