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High-Level FPGA-Programmierung mit automatisch generierten Netzwerken von Automaten
Citation Link: https://doi.org/10.15480/882.1077
Other Titles
High-level FPGA programming using automatically generated networks of finite state machines
Publikationstyp
Doctoral Thesis
Date Issued
2012
Sprache
German
Author(s)
Advisor
Title Granting Institution
Technische Universität Hamburg
Place of Title Granting Institution
Hamburg
Examination Date
2012-09-06
Institut
TORE-DOI
Due to the increasing number of gates and the integration of hard-wired elements within Field Programmable Gate Arrays (FPGAs), high-level language programmability and tools become more necessary. In this thesis the TransC language is introduced in which programs are coded as networks of finite state machines. Concepts for concurrency,interprocess communication and synchronization are developed and optimization techniques are described. Furthermore, a compiler is implemented that generates efficient VHDL code.
Subjects
Synthese
Architektursynthese
FPGA
Prozess
Prozessmodell
Interprozesskommunikation
Automat
VHDL
C
TransC
Hochsprache
synthesis
high-level synthesis
process
process model
interprocess communication
finite state machine
high-level language
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Name
DissMant20120917.pdf
Size
4.71 MB
Format
Adobe PDF