Relevance of gate current for the functionality of deep submicron CMOS circuits

Publikationstyp
Conference Paper
Publikationsdatum
2001
Sprache
English
Author
Schwantes, Stefan 
Krautschneider, Wolfgang 
Integrierte Schaltungen E-9 
TORE-URI
https://hdl.handle.net/11420/47980
Start Page
471
End Page
474
Citation
In: Proceedings of the 31st European Solid-State Device Research Conference : Nuremberg, Germany, 11 - 13 September 2001. - Paris : Frontier Group, 2001.- S. 471-474
Contribution to Conference
31st European Solid-State Device Research Conference, ESSDERC 2001 
Publisher DOI
10.1109/ESSDERC.2001.195303
Scopus ID
2-s2.0-1642332488
Publisher
Frontier Group
ISSN
19308876
ISBN
2914601018
Gate current through very thin gate oxides can endanger the proper functionality of CMOS circuits. For investigation of this effect, we have implemented an improved analytical model for the gate current into a circuit simulator and determined the impact of the gate current on the functionality of basic CMOS circuits. Taking into consideration the local fluctuations of the gate oxide thickness results in a revised lower limit of the nominal gate oxide thickness.
DDC Class
621.3: Electrical Engineering, Electronic Engineering