Applying a physics-based via model for the simulation of Through Silicon Vias

Start Page
65
End Page
68
Article Number
6703468
Citation
2013 IEEE 22nd Conference on Electrical Performance of Electronic Packaging and Systems (EPEPS) : 27 - 30 Oct. 2013, DoubleTree by Hilton Hotel, San Jose, California, USA / sponsored by the IEEE Microwave Theory and Techniques Society and the IEEE Components, Packaging and Manufacturing Technology Society. - Piscataway, NJ : IEEE, 2013. - Art.-Nr. 6703468, i.e. Seite 65-68
Contribution to Conference
IEEE 22nd Conference on Electrical Performance of Electronic Packaging and Systems, EPEPS 2013  
Publisher DOI
10.1109/EPEPS.2013.6703468
Scopus ID
2-s2.0-84893631746
Publisher
IEEE
This paper presents a first approach for the efficient modeling of Through Silicon Vias based on a Physics-Based Via model for application in silicon interposers with metallic boundaries. © 2013 IEEE.
Subjects
3D interconnects
Physics-Based Via Model
Through Silicon Vias
DDC Class
530: Physik
600: Technik
620: Ingenieurwissenschaften
More Funding Information
Deutsche Forschungsgemeinschaft (DFG)