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  4. Leveraging the benefits of information flow tracking for detecting hardware design flaws
 
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Leveraging the benefits of information flow tracking for detecting hardware design flaws

Publikationstyp
Conference Paper
Date Issued
2025-09
Sprache
English
Author(s)
Ganiga, Srinidhi Rathnakar  
Eingebettete Systeme E-13  
Berger, Bernhard Johannes  orcid-logo
Eingebettete Systeme E-13  
Fey, Görschwin  orcid-logo
Eingebettete Systeme E-13  
TORE-URI
https://hdl.handle.net/11420/58341
Start Page
1
End Page
8
Citation
28th Forum on Specification and Design Language, FDL 2025
Contribution to Conference
28th Forum on Specification and Design Language, FDL 2025  
Publisher DOI
10.1109/FDL68117.2025.11165404
Scopus ID
2-s2.0-105018200329
Publisher
IEEE
ISBN
979-8-3315-9380-3
979-8-3315-9379-7
Hardware design weaknesses, when overlooked, can lead to security vulnerabilities. Their cost of fixing is higher the later they are found in the development life cycle. The challenges of detecting these issues in the early stages of hardware design, compared to software design, can be attributed to limited research or poorly defined design guidelines. Using the existing hardware design weakness classification by the MITRE Corporation, we evaluated how Information Flow Tracking (IFT) can be utilized to identify security weaknesses in hardware designs. First, we provide a classification of design weaknesses tailored to detection using IFT. Second, we present a case study to identify one of such weaknesses using an open-source IFT tool. Additionally, we discuss the challenges of using IFT to detect information-flow-based hardware design weaknesses.
Subjects
Common Weakness Enumeration
Hardware Design
Hardware Security
Information Flow Tracking
DDC Class
004: Computer Sciences
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