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A programming language for embedded processor networks
Publikationstyp
Conference Paper
Date Issued
2017-07-31
Sprache
English
Author(s)
Institut
TORE-URI
Start Page
763
End Page
767
Article Number
7999036
Citation
2016 13th IEEE International Conference on Solid-State and Integrated Circuit Technology, ICSICT 2016 - Proceedings: 7999036, 763-767 (2017-07-31)
Contribution to Conference
Publisher DOI
Scopus ID
A simple language for numeric computations on heterogeneous networks of programmable processors is described, in particular networks implemented in an ASIC, an FPGA or an SoC integrating hardwired processors and an FPGA. It relies on an infrastructure providing memory, communications, and various system services. The language supports the use of the multiple non-standard data types typically found in resource-aware FPGA and ASIC applications, and networking, and provides structures for reconfiguration. Application systems can be simulated on a PC. An experimental computer comprising 50 SoC nodes has been designed for further developing the programming concept and the infrastructure.
DDC Class
600: Technik