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Dimensional reduction by auto-encoders in machine learning based power integrity analysis
Publikationstyp
Conference Paper
Date Issued
2024-05
Sprache
English
Citation
SPI 2024 - 28th IEEE Workshop on Signal and Power Integrity, Proceedings
Contribution to Conference
Publisher DOI
Scopus ID
Publisher
IEEE
ISBN
979-8-3503-8293-8
This study1 delves into the application of auto-encoders (AE) to reduce the large dimension of the parameter space for design problems of printed circuit boards (PCB). After dimensional reduction to an adequate sized latent space with controlled information loss, efficient machine learning (ML) methods, such as artificial neural networks (ANN), can support the analysis and the design of PCBs by operating on latent space data. As an example the combination of a trained encoder and a downstream ANN for predicting impedances between various ports of a complex PCB is studied. The decoder of the AE can subsequently be used to remap a latent space representation of PCB data back into the physical space. The efficiency of dimensional reduction due to an AE is compared to low dimensional representation of impedance responses via vector fitting. Finally, SHAP (Shapley Additive Explanations) values are employed to show the significance of individual design parameters on impedance responses. Frameworks linking dimensional reduction by AEs with ANN-based predictive models may provide deeper insights into the complex interactions within PCBs, enable precise predictions of their electrical properties, and, thus, support PCB design.
Subjects
Artificial Neural Network (ANN)
Autoencoder
Impedance Prediction
MLE@TUHH
Power Delivery Networks (PDN)
Printed Circuit Board (PCB) Design
DDC Class
600: Technology