Options
Realization of ultra-low power I/O
Publikationstyp
Conference Paper
Publikationsdatum
2013
Sprache
English
Institut
TORE-URI
Start Page
2218
End Page
2222
Article Number
6575890
Citation
EEE 63rd Electronic Components and Technology Conference (ECTC), 2013 : 28 - 31 May 2013, Las Vegas, Nevada, USA / sponsored by the IEEE Components, Packaging and Manufacturing Technology Society (CPMT) 4030 Piscataway, NJ : IEEE, 2013. - 6575890 i.e. Seite 2218-2222
Contribution to Conference
Publisher DOI
Scopus ID
Publisher
IEEE
This paper summarizes the exploratory work conducted at IBM which seeks to reduce electrical I/O power consumption to facilitate both power distribution and device cooling for future exascale computing systems. The development of novel low-loss dielectric materials was coupled with design for performance to achieve low channel loss by minimizing reflections and energy dissipation due to non-ideal current return paths. A printed circuit board was fabricated and tested, with results confirming a 20% reduction of channel loss at 10GHz when compared to currently leading commercial materials. This 3dB improvement in loss for a 15dB channel, can offer a 50% I/O power reduction when used with power scalable driving/receiving circuits. © 2013 IEEE.
DDC Class
620: Ingenieurwissenschaften