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  4. Memristive operation mode of floating gate transistors : a two-terminal MemFlash-cell
 
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Memristive operation mode of floating gate transistors : a two-terminal MemFlash-cell

Publikationstyp
Journal Article
Date Issued
2012-12-24
Sprache
English
Author(s)
Ziegler, Martin  
Oberländer, M.
Schröder, Dietmar  
Integrierte Schaltungen E-9  
Krautschneider, Wolfgang  
Integrierte Schaltungen E-9  
Kohlstedt, Hermann  
TORE-URI
https://hdl.handle.net/11420/47589
Journal
Applied physics letters  
Volume
101
Issue
26
Article Number
263504
Citation
Applied Physics Letters 101 (26): 263504 (2012)
Publisher DOI
10.1063/1.4773300
Scopus ID
2-s2.0-84871762797
Publisher
American Institut of Physics
A memristive operation mode of a single floating gate transistor is presented. The device resistance varied accordingly to the charge flow through the device. Hysteretic current-voltages including a resistance storage capability were observed. These experimental findings are theoretically supported by a capacitive based model. The presented two-terminal MemFlash-cell can be considered as a potential substitute for any memristive device (especially for reconfigurable logic, cross-bar arrays, and neuromorphic circuits) and is basically compatible with current Si-fabrication technology. The obvious trade-off between a memristive device based on a state-of-the-art silicon process technology and power consumption concerns will be discussed. © 2012 American Institute of Physics.
DDC Class
621.3: Electrical Engineering, Electronic Engineering
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