A radix-10 digit recurrence division unit with a constant digit selection function

Publikationstyp
Conference Paper
Date Issued
2010-11-29
Sprache
English
Author(s)
Baesler, Malte  
Voigt, Sven-Ole  
Teufel, Thomas  
Institut
Zuverlässiges Rechnen E-19  
TORE-URI
http://hdl.handle.net/11420/8530
Start Page
241
End Page
246
Article Number
5647764
Citation
Proceedings - IEEE International Conference on Computer Design: VLSI in Computers and Processors : 5647764, 241-246 (2010-12-01)
Contribution to Conference
28th IEEE International Conference on Computer Design, ICCD 2010  
Publisher DOI
10.1109/ICCD.2010.5647764
Scopus ID
2-s2.0-78650740273
Publisher
IEEE
Decimal floating point operations are important for applications that cannot tolerate errors from conversions between binary and decimal formats, for instance, scientific, commercial, and financial applications. In this work we present a radix-10 digit recurrence division algorithm that decomposes the quotient digits into three parts and requires only the computation of five and two times the divisor. Moreover, the divisor's multiples are selected without multiplexers and the digit selection functions are independent of the divisor's value and do not require a lookup table. The algorithm has been synthesized and verified on a Xilinx Virtex-5 FPGA and implementation results are given.
DDC Class
004: Informatik