Let's go below : potential of undervolting on low-power FPGAs

Publikationstyp
Conference Paper
Date Issued
2023
Sprache
English
Author(s)
Bublitz, Lucas 
Smart Sensors E-EXK3  
Rust, Jochen  
Kulau, Ulf  
Smart Sensors E-EXK3  
TORE-URI
https://hdl.handle.net/11420/44823
Start Page
51
End Page
57
Citation
11th International Workshop on Energy Harvesting & Energy-Neutral Sensing Systems (ENSsys 2023)
Contribution to Conference
11th International Workshop on Energy Harvesting & Energy-Neutral Sensing Systems, ENSsys 2023  
Publisher DOI
10.1145/3628353.3628543
Scopus ID
2-s2.0-85180123646
Publisher
Association for Computing Machinery
ISBN
979-8-40070-438-3
Low power (LP) FPGAs are increasingly used in small embedded systems and sensors as processing units or accelerators. To bring the energy efficiency of these FPGAs to a new level, this paper propagates the utilization of undervolting. First, the development and evaluation of a precise and reliable testbench for automated undervolting tests is presented. Second, a comprehensive feasibility study including 5 DUTs shows devicespecific differences, correlations between absolute minimum voltages, signal propagation delays and also the influence of temperature. Depending on the configuration of the FPGA, voltages can be reduced by up to 71.6% while power dissipation is 3× up to 24.3× lower for complex and simple structures, respectively.
Subjects
Feasibility Study
Low Power Processing
LP FPGA
Undervolting
DDC Class
004: Computer Sciences
620: Engineering