Circuit design methodology of radiation-tolerant DAC for space applications

In this paper, a general circuit design methodology for space applications is presented with an 8-bit resistive DAC with XY addressing mode and BiCMOS buffer designed in SiGe BiCMOS technology. Circuit-level simulations are performed to evaluate the radiation tolerance of the DAC. Simulations show that even though the DAC core circuit is immune to radiation effects, auxiliary circuits are highly susceptible to analog single-event transients (ASETs). Circuit-level mitigation techniques are addressed, resulting in a DAC that is estimated to be immune to 60 MeVcm2/mg SET. The total current consumption with 3.3 V supply is 0.58 mA at 1 MHz sampling frequency.

Subjects

ASET

DAC

radiation tolerant

SiGe BiCMOS technology

Space applications

TID

DDC Class

0: Computer Science, Information and General Works::005: Computer Programming, Programs, Data and Security::005.1: Programming

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Circuit design methodology of radiation-tolerant DAC for space applications