Designing networks-on-chip for high assurance real-time systems

Publikationstyp
Conference Paper
Date Issued
2017-05-05
Sprache
English
Author(s)
Rambo, Eberle Andrey  
Seitz, Christoph  
Saidi, Selma  
Ernst, Rolf  
Institut
Eingebettete Systeme E-13  
TORE-URI
http://hdl.handle.net/11420/4080
Start Page
185
End Page
194
Article Number
7920612
Citation
Proceedings of IEEE Pacific Rim International Symposium on Dependable Computing, PRDC: 7920612, 185-194 (2017-05-05)
Contribution to Conference
22nd IEEE Pacific Rim International Symposium on Dependable Computing, PRDC 2017  
Publisher DOI
10.1109/PRDC.2017.32
Scopus ID
2-s2.0-85019563691
Publisher
IEEE
Conventional fault-tolerance approaches for Networks-on-Chip (NoCs) cannot be applied to high assurance real-time systems due to their different goals and constraints. These systems impose strict integrity, resilience and real-time requirements. All possible effects of hardware errors must be taken into account and the resulting system must be predictable, even in the presence of errors. In this paper, we present a wormhole-switched NoC with virtual channels for high assurance real-time systems hardened against soft errors. All possible duration and impacts of soft errors are taken into account and the resulting NoC operates with formal guarantees. Experimental evaluation shows that the network is able to provide a predictable behavior even in aggressive environments with very high error rates.
Subjects
High Assurance
Network-on-Chip
Real-time
Reliability
Soft Errors
DDC Class
600: Technik
More Funding Information
This work has been partially funded by the German Research Foundation (DFG) as part of the priority program ”Dependable Embedded Systems” (SPP 1500 – spp1500.itec.kit.edu).