Options
Final report for DFG project No. FE797/15-1 Title: Methodology, algorithms, and framework for hardware design understanding
Citation Link: https://doi.org/10.15480/882.15188
Publikationstyp
Research Report
Date Issued
2024-08-13
Sprache
English
Author(s)
Other Contributor
TORE-DOI
Peer Reviewed
true
Understanding a given digital system design one is unfamiliar with is at least as hard as implementing it. Particularly, this holds for systems designed in large projects where no single person knows all the details, legacy components with poor or outdated documentation are reused, and team members change regularly. Designers then try to understand the inner logic of the design using various sources -- informal discussions with team members, textual information like documents for requirements and specifications, and review as well as execution of source code and test cases.
This project created a tool to support designers in understanding the source code of a system design at the Register Transfer Level (RTL). The main focus was on techniques and algorithms known from security analysis and their application for design understanding, investigating the first steps towards advanced user interfaces, providing benchmarking cases, and open-sourcing the resulting implementation. The tool DuRTL is now available in its first release: https://github.com/TUHH-IES/DuRTL
Moreover, the recently drastically increased capabilities of Large Language Models (LLMs) directly relate to the theme of the project, so initial steps toward assessing their capabilities have been made.
This project created a tool to support designers in understanding the source code of a system design at the Register Transfer Level (RTL). The main focus was on techniques and algorithms known from security analysis and their application for design understanding, investigating the first steps towards advanced user interfaces, providing benchmarking cases, and open-sourcing the resulting implementation. The tool DuRTL is now available in its first release: https://github.com/TUHH-IES/DuRTL
Moreover, the recently drastically increased capabilities of Large Language Models (LLMs) directly relate to the theme of the project, so initial steps toward assessing their capabilities have been made.
Subjects
Hardware design
Electronic design automation
Understanding system design
Computer science
DDC Class
004: Computer Sciences
621.3: Electrical Engineering, Electronic Engineering
006.3: Artificial Intelligence
Funding Organisations
Loading...
Name
report_public.pdf
Size
396.7 KB
Format
Adobe PDF