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Efficient calculation of external fringing capacitances for physics-based PCB modeling
Publikationstyp
Conference Paper
Date Issued
2015-09-02
Sprache
English
Institut
TORE-URI
Article Number
7237396
Citation
IEEE Workshop on Signal and Power Integrity, SPI : 7237396 (2015-09-02)
Contribution to Conference
Publisher DOI
Scopus ID
This paper presents an efficient computation of the static capacitance related to external fringing fields of vias (plated through holes) in printed circuit boards (PCBs). For this purpose, a numerical approach based on an integral equation for the surface charge density of axially symmetric geometries is used. The proposed method is validated with a commercial quasi-static tool. The capacitance model is applied to the modeling of typical PCB via stubs in the frequency range between 1 and 40 GHz. The results from the physics-based modeling are confirmed with a full-wave solver.
Subjects
parasitic capacitance extraction
printed circuit board (PCB)
Via modeling