Prediction of soft error rate of 4 Mbit DRAM

Publikationstyp
Conference Paper
Date Issued
1987
Sprache
English
Author(s)
Krautschneider, Wolfgang  
Meyberg, W.  
TORE-URI
https://hdl.handle.net/11420/47912
Start Page
709
End Page
712
Article Number
5436731
Citation
In: Giovanni Soncini, Pier Ugo Calzolari (Hrsg.): Solid state devices : proceedings of the 17th European Solid State Device Research Conference, ESSDERC '87, Bologna, Italy, 14-17 September 1987. - Amsterdam ; New York ; New York, N.Y., U.S.A : North-Holland ; Sole distributors for the U.S.A. and Canada, Elsevier Science Pub. Co, 1988. - S. 709-712
Contribution to Conference
17th European Solid State Device Research Conference, ESSDERC 1987  
Publisher Link
https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=5436731
Scopus ID
2-s2.0-84907806871
Publisher
IEEE Computer Society
ISSN
19308876
ISBN
0444704779
9780444704771
A method has been developed for estimation of soft error rate of memory chips. At special test structures which are as simply designed as possibly the charge collection induced by alpha strikes is measured. From these data the soft error rate can be calculated.
DDC Class
621.3: Electrical Engineering, Electronic Engineering