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Schedulability-aware SPM Allocation for preemptive hard real-time systems with arbitrary activation patterns
Publikationstyp
Conference Paper
Date Issued
2017-05-11
Sprache
English
Author(s)
Institut
TORE-URI
Start Page
1074
End Page
1079
Article Number
7927149
Citation
Proceedings of the 2017 Design, Automation and Test in Europe, DATE 2017: 7927149, 1074-1079 (2017-05-11)
Contribution to Conference
Publisher DOI
Scopus ID
Publisher
IEEE
In hard real-time multi-tasking systems each task has to meet its deadline under any circumstances. If one or several tasks violate their timing constraints, compiler optimizations can be used to optimize the Worst-Case Execution Time (WCET) of each task with a focus on the system's schedulability. Existing approaches are limited to single-tasking or strictly periodic multitasking systems. We propose a compiler optimization to perform a schedulability-aware static instruction Scratchpad Allocation for arbitrary activation patterns and deadlines. The approach is based on Integer-Linear Programming and is evaluated for the Infineon TriCore TC1796 microcontroller.
DDC Class
004: Informatik
More Funding Information
Deutsche Forschungsgemeinschaft (DFG)