Two-stage network processor for an independent HVDC grid supervisory control
Publikationstyp
Conference Paper
Date Issued
2016-07
Sprache
English
TORE-URI
Number in series
2016 November
Article Number
7741289
Citation
IEEE Power and Energy Society General Meeting (PESGM 2016): 7741289
Contribution to Conference
Publisher DOI
Scopus ID
Publisher
IEEE
ISBN
978-1-5090-4168-8
978-1-5090-4169-5
ISBN of container
978-150904168-8
This paper proposes a two-stage network processor for the supervisory control of multi-terminal HVDC grid that connects different AC areas. The proposed network processor processes the DC substation topology locally in the first stage and analyzes the HVDC grid connectivity at the supervisory controller. The processor uses the k-means clustering method to detect the islands in HVDC grid and prepares required information to carry out the converter control mode assignation. The performance of the method has been tested for an islading scenario in a 7-terminal HVDC grid using a real-time co-simulation platform. The output of network processor helps the control application at the supervisory level to make decisions based on the control modes of the available converters in the islands. This two-stage architecture has been compared with the centralized architecture in terms of computational complexity.
DDC Class
600: Technology