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Data retention analysis on individual cells of 256Mb DRAM in 110nm technology
Publikationstyp
Conference Paper
Date Issued
2005-12-01
Sprache
English
Volume
2005
Start Page
185
End Page
188
Article Number
1546616
Citation
In: Proceedings of 35th European Solid-State Device Research Conference, 2005, ESSDERC 2005 : 12 - 16 Sept. 2005, [Grenoble, France]. - Piscataway, NJ : IEEE Operations Center, 2005. - S. 185-188
Publisher DOI
Scopus ID
Publisher
IEEE
ISBN
0780392035
9780780392038
In DRAM every memory cell experiences an individual mixture of leakage currents which consume part of the stored charge and lead to a wide distribution of data retention time (tRet). This distribution consists of an intrinsic (main) and an extrinsic (tail) branch. The formalism of activation energies (Ea) provides information about the mechanisms involved. Activation energies of single cells in a 256M DDR memory chip and their dependence on negative gate bias (VNWLL) as well as body bias (VBB) have been investigated intensively for the first time. The worst tail cells - all within a small retention time interval - show a twofold and wide distribution of activation energies. The lower Ea distribution can be altered with VNWLL, whereas the higher Ea distribution only alters with VBB. Going from tail towards main distribution, the percentage of cells belonging to the low Ea part continuously decreases and finally disappears. We therefore conclude that a gate induced mechanism (GIDL) is the main component responsible for DRAM retention tail.
DDC Class
621.3: Electrical Engineering, Electronic Engineering