Work in progress : optimizing schedulability using cache-bypassing

Publikationstyp
Conference Paper
Date Issued
2025-05
Sprache
English
Author(s)
Fischer, Thilo  orcid-logo
Eingebettete Systeme E-13  
Falk, Heiko  orcid-logo
Eingebettete Systeme E-13  
TORE-URI
https://hdl.handle.net/11420/56083
Start Page
418
End Page
421
Citation
31st IEEE Real-Time and Embedded Technology and Applications Symposium, RTAS 2025
Contribution to Conference
31st IEEE Real-Time and Embedded Technology and Applications Symposium, RTAS 2025  
Publisher DOI
10.1109/RTAS65571.2025.00015
Scopus ID
2-s2.0-105008055713
Publisher
IEEE
ISBN
979-8-3315-4340-2
979-8-3315-4341-9
We present an optimization technique to improve system schedulability using selective cache bypassing. By allocating parts of the application to uncached memory sections during compilation, context-switching costs and intra-task cache interference are reduced, leading to improved schedulability. We compare the performance of simulated annealing and the strength pareto evolutionary algorithm (SPEA) for the optimization problem. Our evaluation demonstrates an increase in schedulability by up to 20 percentage points using SPEA.
Subjects
Costs | Simulated annealing | Interference | Evolutionary computation | Real-time systems | Optimization
DDC Class
600: Technology