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Ensuring safety and efficiency in networks-on-chip

Publikationstyp
Journal Article
Date Issued
2017-06
Sprache
English
Author(s)
Kostrzewa, Adam  
Saidi, Selma  
Ecco, Leonardo  
Ernst, Rolf  
Institut
Eingebettete Systeme E-13  
TORE-URI
http://hdl.handle.net/11420/3947
Journal
Integration, the VLSI Journal  
Volume
58
Start Page
571
End Page
582
Citation
Integration, the VLSI Journal (58): 571-582 (2017-06)
Publisher DOI
10.1016/j.vlsi.2016.10.015
Scopus ID
2-s2.0-85006507603
Networks-on-Chip (NoCs) for real-time systems require solutions for safe and predictable sharing of network resources between transmissions with different quality of service requirements. In this work, we present a mechanism for a global and dynamic admission control in NoCs dedicated to real-time systems. It introduces an overlay network to synchronize transmissions using arbitration units called Resource Managers (RMs), which allows a global and work-conserving scheduling. We present a formal worst-case timing analysis for the proposed mechanism and demonstrate that this solution not only exposes higher performance in simulation but, even more importantly, consistently reaches smaller formally guaranteed worst-case latencies than TDM for realistic levels of system's utilization. Our mechanism does not require the modification of routers and therefore can be used together with any architecture utilizing non-blocking routers.
Subjects
Dynamic admission control
Networks-on-Chip
Real-time systems
Safety-critical multicores
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