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  4. Grading defects: evaluating approximate circuits for error-tolerant systems
 
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Grading defects: evaluating approximate circuits for error-tolerant systems

Publikationstyp
Conference Paper
Date Issued
2025-10
Sprache
English
Author(s)
Martino, Gianluca  orcid-logo
Eingebettete Systeme E-13  
Garcia-Ortiz, Alberto  
Schammer, Lutz  
Eingebettete Systeme E-13  
Fey, Görschwin  orcid-logo
Eingebettete Systeme E-13  
TORE-URI
https://hdl.handle.net/11420/60241
Start Page
1
End Page
7
Citation
IEEE Nordic Circuits and Systems Conference, NorCAS 2025
Contribution to Conference
IEEE Nordic Circuits and Systems Conference, NorCAS 2025  
Publisher DOI
10.1109/norcas66540.2025.11231275
Publisher
IEEE
ISBN of container
979-8-3315-1502-7
979-8-3315-1501-0
Applications such as image processing and machine learning can tolerate computational inaccuracies, allowing for the use of approximate circuits that trade precision for reduced power consumption and improved performance. Traditional testing methods, designed for exact computing, often discard a circuit upon detecting any defect, which is too strict for approximate circuits where minor deviations are acceptable. To overcome this limitation, we introduce and formalize a novel testing methodology for approximate circuits that quantifies the impact of defects on overall performance. Our method assesses the degree of approximation by measuring how defects affect computational accuracy. Instead of a binary pass/fail outcome, this technique grades the quality of the circuit, enabling a precise test-based separation of acceptable and unacceptable circuits. This approach not only enhances testing efficiency but also expands the potential for deploying approximate circuits across various fields.
Subjects
testing
approximate computing
fault tolerance
DDC Class
004: Computer Sciences
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