|Publisher DOI:||10.1109/NorCAS53631.2021.9599866||Title:||Low Power CMOS Thyristor-Based Relaxation Oscillator with Efficient Current Compensation||Language:||English||Authors:||Jotschke, Marcel
Ossa, Wilmar Carvajal
|Keywords:||CMOS thyristor; Low power; Relaxation oscillator||Issue Date:||Oct-2021||Source:||IEEE Nordic Circuits and Systems Conference (NORCAS 2021)||Abstract (english):||
This paper presents a microwatt voltage-mode relaxation oscillator, whose main innovation is the utilization of CMOS thyristor circuits as decision elements. It provides stable on-chip 140 kHz clock source for ultra-low power autonomous systems. The employment of CMOS thyristors reduces the dynamic power consumption compared to the classical topology, but introduces strong PTAT temperature dependency. This is compensated by a CTAT current reference, which recycles parts of the PTAT bias generation block and therefore relaxes overall chip area and power penalty. The reference start-up time is effectively decreased by a modified start-up circuit, which shortens system power-on. The oscillator excluding the recycled PTAT occupies 0.09 mm2 and draws 907.4 nW from 1.8 V supply, resulting in a Figure-of-Merit of 6.5 nW/kHz. With the PTAT reference accounted, 1.20 μW, 8.6 nW/kHz and 0.11 mm2 were achieved. Measurements show a temperature coefficient of-514.7 ppm/K in the range of-40°C to 85°C with the proposed compensation, achieving an improvement of 5.5 times compared to the simulated uncompensated case. The frequency variation is 2.62 %/V N within supply voltage range of 1.5 V to 2.5 V.
|Conference:||IEEE Nordic Circuits and Systems Conference, NORCAS 2021||URI:||http://hdl.handle.net/11420/11642||ISBN:||978-166540712-0||Institute:||Integrierte Schaltungen E-9||Document Type:||Chapter/Article (Proceedings)|
|Appears in Collections:||Publications without fulltext|
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