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  4. Low Power CMOS Thyristor-Based Relaxation Oscillator with Efficient Current Compensation
 
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Low Power CMOS Thyristor-Based Relaxation Oscillator with Efficient Current Compensation

Publikationstyp
Conference Paper
Date Issued
2021-10
Sprache
English
Author(s)
Jotschke, Marcel  
Palanisamy, Gokulkumar  
Ossa, Wilmar Carvajal  
Prabakaran, Harsha  
Koh, Jeongwook  
Kuhl, Matthias  orcid-logo
Krautschneider, Wolfgang  
Reich, Torsten  
Mayr, Christian  
Institut
Integrierte Schaltungen E-9  
TORE-URI
http://hdl.handle.net/11420/11642
Citation
IEEE Nordic Circuits and Systems Conference (NORCAS 2021)
Contribution to Conference
IEEE Nordic Circuits and Systems Conference, NORCAS 2021  
Publisher DOI
10.1109/NorCAS53631.2021.9599866
Scopus ID
2-s2.0-85123478705
This paper presents a microwatt voltage-mode relaxation oscillator, whose main innovation is the utilization of CMOS thyristor circuits as decision elements. It provides stable on-chip 140 kHz clock source for ultra-low power autonomous systems. The employment of CMOS thyristors reduces the dynamic power consumption compared to the classical topology, but introduces strong PTAT temperature dependency. This is compensated by a CTAT current reference, which recycles parts of the PTAT bias generation block and therefore relaxes overall chip area and power penalty. The reference start-up time is effectively decreased by a modified start-up circuit, which shortens system power-on. The oscillator excluding the recycled PTAT occupies 0.09 mm2 and draws 907.4 nW from 1.8 V supply, resulting in a Figure-of-Merit of 6.5 nW/kHz. With the PTAT reference accounted, 1.20 μW, 8.6 nW/kHz and 0.11 mm2 were achieved. Measurements show a temperature coefficient of-514.7 ppm/K in the range of-40°C to 85°C with the proposed compensation, achieving an improvement of 5.5 times compared to the simulated uncompensated case. The frequency variation is 2.62 %/V N within supply voltage range of 1.5 V to 2.5 V.
Subjects
CMOS thyristor
Low power
Relaxation oscillator
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