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  4. Augmenting all solution SAT solving for circuits with structural information
 
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Augmenting all solution SAT solving for circuits with structural information

Publikationstyp
Conference Paper
Date Issued
2018-07-11
Sprache
English
Author(s)
Tibebu, Abraham Temesgen  
Fey, Görschwin  orcid-logo
Institut
Eingebettete Systeme E-13  
TORE-URI
http://hdl.handle.net/11420/2629
Start Page
117
End Page
122
Citation
21st IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems, DDECS: 117-122 (2018-07-11)
Contribution to Conference
21st IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems, DDECS 2018  
Publisher DOI
10.1109/DDECS.2018.00028
Scopus ID
2-s2.0-85050984921
Publisher
IEEE
All solutions SAT (All-SAT) is important in applications where we require enumerating all satisfying assignments of a propositional formula, e.g., when reasoning over many or all possible test patterns in Automatic Test Pattern Generation (ATPG). We applied structural analysis starting from primary inputs or primary outputs to generalize a current total assignment to a partial assignment. This speeds up the determination of all satisfying assignments. The experiments were conducted using a large number of random instances and different available All-SAT solvers. We show that structural analysis techniques can significantly speed up enumeration of all satisfying assignments of combinational circuits and yield the the second largest number of total satisfying assignments from all compared All-SAT solvers.
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