Integration of Double Barrier Memristor Die with Neuron ASIC for Neuromorphic Hardware Learning

Publikationstyp
Conference Paper
Publikationsdatum
2018-04-26
Sprache
English
Author
Ranjan, Rajeev 
Hansen, Mirko 
Mendoza Ponce, Pablo Daniel 
Abu Saleh, Lait 
Schröder, Dietmar 
Ziegler, Martin 
Kohlstedt, Hermann 
Krautschneider, Wolfgang 
Institut
Integrierte Schaltungen E-9 
TORE-URI
http://hdl.handle.net/11420/2699
Start Page
1
End Page
5
Article Number
8350996
Citation
IEEE International Symposium on Circuits and Systems: 8350996, 1-5 (2018-04-26)
Contribution to Conference
IEEE International Symposium on Circuits and Systems, ISCAS 2018 
Publisher DOI
10.1109/ISCAS.2018.8350996
Scopus ID
2-s2.0-85057108078
Publisher
IEEE
This paper details the design of an integrate fire (I F) neuron ASIC and its integration with a double barrier memristor device. The memristor has a non-volatile analog memory characteristic which changes with time and voltage. The neuron ASIC is designed to interact with the memristor by integrating its current and firing when a certain threshold is reached. The resulting spikes increase the memristor's conductance and consequently the firing rate of neuron increases. Together, the ASIC and the memristor mimics neuromorphic learning on hardware. The ASIC has been fabricated in AMS 350nm process.
More Funding Information
German Research Foundation (DFG) for funding the research group FOR2093 (Memristive Components for Neural Systems), Project C2 (Neural Circuits)