| Publisher DOI: | 10.1109/ISCAS.2018.8350996 | Title: | Integration of Double Barrier Memristor Die with Neuron ASIC for Neuromorphic Hardware Learning | Language: | English | Authors: | Ranjan, Rajeev Hansen, Mirko Mendoza Ponce, Pablo Daniel  Abu Saleh, Lait Schröder, Dietmar Ziegler, Martin Kohlstedt, Hermann Krautschneider, Wolfgang |
Issue Date: | 26-Apr-2018 | Publisher: | IEEE | Source: | IEEE International Symposium on Circuits and Systems: 8350996, 1-5 (2018-04-26) | Abstract (english): | This paper details the design of an integrate fire (I F) neuron ASIC and its integration with a double barrier memristor device. The memristor has a non-volatile analog memory characteristic which changes with time and voltage. The neuron ASIC is designed to interact with the memristor by integrating its current and firing when a certain threshold is reached. The resulting spikes increase the memristor's conductance and consequently the firing rate of neuron increases. Together, the ASIC and the memristor mimics neuromorphic learning on hardware. The ASIC has been fabricated in AMS 350nm process. |
Conference: | IEEE International Symposium on Circuits and Systems, ISCAS 2018 | URI: | http://hdl.handle.net/11420/2699 | ISBN: | 978-1-5386-4881-0 978-1-5386-4882-7 |
Institute: | Integrierte Schaltungen E-9 | Document Type: | Chapter/Article (Proceedings) | More Funding information: | German Research Foundation (DFG) for funding the research group FOR2093 (Memristive Components for Neural Systems), Project C2 (Neural Circuits) |
| Appears in Collections: | Publications without fulltext |
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