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A 16-bit Pressure Sensing Interface Integrating a 460 fJ/conv Incremental Sigma Delta ADC for Medical Devices
Publikationstyp
Conference Paper
Publikationsdatum
2020-02
Sprache
English
Author
Institut
TORE-URI
Article Number
9068978
Citation
Latin American Symposium on Circuits and Systems, LASCAS: 9068978 (2020-02)
Contribution to Conference
Publisher DOI
Scopus ID
2-s2.0-85084297804
This work presents an incremental 2nd-order sigma delta using a single operational transconductance amplifier. This design provides a good trade-off between time conversion, high bit resolution, power consumption and area utilization for a pressure sensing reading interface. The modulator, designed in 180 nm CMOS technology, has been optimized for low area utilization, occupying only 0.058 mm2. Post-layout simulations were performed showing a resolution of 150 μV while consuming 120 μW and 460 fJ/conv. The system has a resolution of 16 bits, a bandwidth of 2 kHz, an oversampling ratio of 512 and a sampling frequency of 2 MHz.
Schlagworte
CMOS
Incremental analog-to-digital converter (IADC)
low-area
low-power
sigma delta modulation