|Publisher DOI:||10.1145/2906363.2906369||Title:||Cache-aware instruction SPM allocation for hard real-time systems||Language:||English||Authors:||Luppold, Arno
|Keywords:||Compiler;Integer-linear programming;Optimization;Real-time;WCET||Issue Date:||23-May-2016||Source:||International Workshop on Software and Compilers for Embedded Systems, SCOPES: 77-85 (2016-05-23)||Abstract (english):||To improve the execution time of a program, parts of its instructions can be allocated to a fast Scratchpad Memory (SPM) at compile time. This is a well-known technique which can be used to minimize the program's worst-case Execution Time (WCET). However, modern embedded systems often use cached main memories. An SPM allocation will inevitably lead to changes in the program's memory layout in main memory, resulting in either improved or degraded worst-case caching behavior. We tackle this issue by proposing a cache-aware SPM allocation algorithm based on integer-linear programming which accounts for changes in the worst-case cache miss behavior.||Conference:||19th International Workshop on Software and Compilers for Embedded Systems, SCOPES 2016||URI:||http://hdl.handle.net/11420/6251||ISBN:||978-145034320-6||Institute:||Eingebettete Systeme E-13||Type:||InProceedings (Aufsatz / Paper einer Konferenz etc.)|
|Appears in Collections:||Publications without fulltext|
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