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  4. Realization of ultra-low power I/O
 
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Realization of ultra-low power I/O

Publikationstyp
Conference Paper
Date Issued
2013
Sprache
English
Author(s)
Shan, Lei  
Dickson, Timothy  
Kwark, Young Hoon  
Baks, Christian W.  
Becker, Dale  
Krabbenhoft, Roger  
Chainer, Timothy  
Müller, Sebastian  
Hoshino, Manabu  
Kodemura, Junji  
Hashimoto, Masakazu  
Jimbo, Toshihiko  
Blatt, Christopher  
Institut
Theoretische Elektrotechnik E-18  
TORE-URI
http://hdl.handle.net/11420/6380
Start Page
2218
End Page
2222
Article Number
6575890
Citation
EEE 63rd Electronic Components and Technology Conference (ECTC), 2013 : 28 - 31 May 2013, Las Vegas, Nevada, USA / sponsored by the IEEE Components, Packaging and Manufacturing Technology Society (CPMT) 4030 Piscataway, NJ : IEEE, 2013. - 6575890 i.e. Seite 2218-2222
Contribution to Conference
63rd Electronic Components and Technology Conference, ECTC 2013  
Publisher DOI
10.1109/ECTC.2013.6575890
Scopus ID
2-s2.0-84883326897
Publisher
IEEE
This paper summarizes the exploratory work conducted at IBM which seeks to reduce electrical I/O power consumption to facilitate both power distribution and device cooling for future exascale computing systems. The development of novel low-loss dielectric materials was coupled with design for performance to achieve low channel loss by minimizing reflections and energy dissipation due to non-ideal current return paths. A printed circuit board was fabricated and tested, with results confirming a 20% reduction of channel loss at 10GHz when compared to currently leading commercial materials. This 3dB improvement in loss for a 15dB channel, can offer a 50% I/O power reduction when used with power scalable driving/receiving circuits. © 2013 IEEE.
DDC Class
620: Ingenieurwissenschaften
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