Fully Integrated Dual-Polarized Antenna Array with Ultra-Wideband Single-Chip CMOS Receiver (DataRace)
September 1, 2016
November 30, 2021
In the ongoing first project phase the 3D-integration of a small transmitter array and a CMOS power amplifier at W-band using a low-cost stereolithographic process is demonstrated. The available bandwidth of 35 GHz, dual-polarization, and the use of moderately complex modulation schemes suffice for data rates up to 100 Gbit/s.The main goal of the present proposal is to extend this concept to a complete receiver with independent beam-steering for the two polarizations and to demonstrate data transmission at 100 Gbit/s. An advanced frontend consisting of a wideband, circularly polarized antenna at W-band and its subsequent receiver chip for 100 Gbit/s shall thus be implemented in a system-in-package and shall be used as an element of a larger array. The functionality of the chip shall include down-conversion and conversion to the digital domain. The same low-cost 3D-manufacturing process as previously shall be used for the antenna design and the integration of the receiver chip. The chip design shall be performed by the Working Groups (WG) of Prof. Böck (RF part) and Prof. Gerfers (digital part) from TU Berlin, while the antenna and packaging issues shall be addressed by the WG of Prof. Jacob from TU Hamburg-Harburg (TUHH). The system performance shall be experimentally verified in cooperation with the SPP1655 project Tera50+ from the University at Duisburg-Essen. This way the receiver side and the higher integration density associated with a complete receiver unit within a larger array will be investigated.