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Item type:Publication, Access status: with files , An impedance spectroscopy ASIC for low-frequency characterization of biological samplesThis paper describes the design and testing of an ASIC for impedance spectroscopy of biological samples at frequencies up to 40 kHz. The circuit is designed in the 350 nm AMS H35B4 technology and enables the measurement of impedances in the range of 10 kW up to 28 MW. The design features a digital oscillator and a current-to-voltage converter. The ASIC is used to monitor the growth of yeast cell cultures and porcine chondrocytes, in real-time, using a standard 384-well plate and copper electrodes.Publicationtype: Conference PaperScopus© Citations 1 186 241 - Some of the metrics are blocked by yourconsent settings
Item type:Publication, Access status: without files , A 130NM ASIC for EMG signal acquisition to control a hand prosthetic(SciTePress, 2012); ; ; ; A mixed-signal chip in 130nm Technology is described. The chip acquires EMG signals from five differential inputs. The signals are amplified, multiplexed and digitized inside the developed chip. The ASIC is optimised for low power and low noise and is intended for application in medical implants. Furthermore, the chip provides a configuration options for several parameters for the analogue part of the chip. The chip has been tested by recording EMG signals from implanted Myo-Electrodes.Publicationtype: Conference Paper11 - Some of the metrics are blocked by yourconsent settings
Item type:Publication, Access status: without files , A configurable integrated circuit for biomedical signal acquisition(Springer, 2011-01); ; ; ; Publicationtype: Conference Paper33 - Some of the metrics are blocked by yourconsent settings
Item type:Publication, Access status: without files , An integrated multi-channel system for biomedical signal acquisition(SciTePress, 2011); ; ; ; A CMOS configurable system-on-chip (SoC) for biomedical signal acquisition is described. The SoC is composed of 10 channels, each channel including a programmable analog front-end (AFE) and a 20 bit analog-to-digital converter (ADC). The digitized signals are read out via a high-speed serial communication bus. The AFE includes a common-mode rejection ratio (CMRR) calibration circuitry resulting in a CMRR of more than 80 dB and an active DC-suppression circuitry giving the DC-coupled instrumentation amplifier the possibility to tolerate DC-offsets of up to ± 1 V for a power supply voltage of 3.3 V. In low-noise mode the AFE achieves an input referred noise of less than 50 nVrms for EEG application (0.5-70 Hz) and the power consumption of a channel including AFE and ADC is less than 5 mW in low-power mode. A prototype has been fabricated in a 0.35 μm CMOS process.Publicationtype: Conference Paper22 - Some of the metrics are blocked by yourconsent settings
Item type:Publication, Access status: without files , Highly sensitive biomedical amplifier with cmrr calibration and dc-offset compensationTo cover a wide range of biomedical applications, the presented instrumentational amplifier (INA) for acquisition of biomedical signals is adjustable regarding power consumption and noise. In addition, DC-offsets larger than & 500 mV resulting from electrochemical potentials of the electrodes can be compensated by applying a voltage to an additional input. To achieve a high common mode rejection ratio (CMRR) of more than 80 dB, a digitally controlled calibration circuitry has been integrated. The novel concept of calibrating the CMRR in the high resistive feedback loop of an opamp and the DC electrode potential suppression does not require any external components. The INA has been fabricated in a 350 nm CMOS technology.Publicationtype: Conference Paper13 - Some of the metrics are blocked by yourconsent settings
Item type:Publication, Access status: without files , A 130nm CMOS programmable operational amplifierIn this work we present a programmable 1.2 V Operational Amplifier (OpAmp) realized in a standard 130 nm CMOS technology. The OpAmp is based on a 3 V rail-to-rail input/output topology. The experimental results show the feasibility of using higher voltage topologies in conjunction with multi-threshold (multi-Vth) process options for low voltage designs. The programming range extends from a low-noise to a low-power mode. In addition, a constant-gm stage has been added to the rail-to-rail input. In low-noise mode the OpAmp has a low input thermal noise voltage of 5.1 nV/√Hz and in lowpower mode a power consumption of only 203 μW. Over the whole programming range the OpAmp maintains unity-gain stability with its phase margin varying between 58° and 62°Publicationtype: Conference Paper15 - Some of the metrics are blocked by yourconsent settings
Item type:Publication, Access status: without files , A flexible system-on-chip (SoC) for biomedical signal acquisition and processing(Elsevier, 2008-03-10); ; ; 13 - Some of the metrics are blocked by yourconsent settings
Item type:Publication, Access status: without files , A portable SoC-based ECG-system for 24h × 7d operating time(IEEE, 2008); ; ; A portable battery powered 3-channel ECG-system is presented. This system can be operated up to 10 days by two standard AA batteries. It acquires 3 ECG signals with 16 bit resolution using a dedicated System on Chip (SoC) with an embedded DSP for power efficient data handling. The digitized data are filtered with an 80th order FIR filter and stored on a Compact Flash (CF) card that can be read out using a standard PC operating system. Combining high performance analog parts for signal acquisition and a powerful DSP on a single chip opens up innovative possibilities in reduction of system size and power consumption.Publicationtype: Conference Paper8