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    Item type:Publication, Access status: without files ,
    ISFD : Efficient and Fault-tolerant In-System-Failure-Detection for LP FPGA-based Smart-Sensors in Space Expeditions
    (IEEE, 2024-04)
    Rahman, Kazi Mohammad Abidur
    ;
    Dirkes, Timo
    ;
    Delfs, Bjoern
    ;
    Wyrwoll, Vanessa
    ;
    Kulau, Ulf
    The health of astronauts is a top priority in manned space missions, and space conditions can have a major impact on the physiology of the human body. This is why extensive health monitoring is essential, especially for future missions beyond low Earth orbit (LEO), where astronauts will be increasingly exposed to higher radiation doses. To address these challenges, the AuRelia project has developed space-capable smart sensors that are designed to be failure-tolerant and autonomous. These sensors employ an innovative In-System-Failure-Detection (ISFD) technique that caters to the increasing need for Single Event Effect (SEE)-induced failure tolerance in resource-constrained and ultra-low power SRAM-based FPGAs used in miniaturized smart sensors. The ISFD technique integrates a hardware-based radiation-tolerant Test Core (using only 77 LUTs) with a software-based Test Controller, resulting in a lightweight yet efficient solution for failure detection. What's more, the adaptability of ISFD facilitates seamless integration into existing firmware and software, offering developers a swift implementation process. ISFD complements traditional blind scrubbing methods, enhancing sensor data reliability, and has been validated with radiation up to 70Krad.
    Publicationtype: Conference Paper
      10
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    Item type:Publication, Access status: without files ,
    A High-Performance Mass Memory Unit for Next Generation Satellite Systems
    (2022-09)
    Rust, Jochen
    ;
    Geißinger, Konstantin
    ;
    Dirkes, Timo
    ;
    Grürmann, Kai
    ;
    Smith, Daniel
    High-performance Mass Memory Units are a key factor to process the vast amount of data of todays and upcoming space missions. In this work we present a high-performance but reliable mass memory unit for next generation satellite systems and deep space explorer missions. Peak data rates of up to 20 Gbps are targeted. To this end, a novel architectural hardware design is necessary, comprising high-speed interfaces as well as two FPGA devices for managing the I/O and memory device access. In order to achieve maximum storage capacities of up to 48 TBit, suitable FLASH-based memory devices must be selected and qualified, leading to a comprehensive up-screening campaign that needs to be carried out, too.
    Publicationtype: Conference Paper
      166