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Item type:Publication, Access status: without files , Combined Assessment of Interconnect and Equalization in Data Links on Multilayer Printed Circuit Boards(2019-02-01); Publicationtype: Bachelor Thesis227 - Some of the metrics are blocked by yourconsent settings
Item type:Publication, Access status: without files , Direct prediction of linear equalization coefficients using raised cosine pulse shaping in frequency domain(2018-05); ; Publicationtype: Conference Paper98 - Some of the metrics are blocked by yourconsent settings
Item type:Publication, Access status: without files , Efficient Sensitivity-Aware Assessment of High-Speed Links Using PCE and Implications for COMPublicationtype: Conference Paper37 - Some of the metrics are blocked by yourconsent settings
Item type:Publication, Access status: without files , Efficient prediction of equalization effort and channel performance for PCB-based data links(IEEE, 2017-09-28); ; ; ; High-speed data links that utilize multilayer printed circuit boards suffer from loss, dispersion, and intersymbol interference. Often, equalization and error correction are required to make these channels functional at gigabit data rates and demand costly analyses. The characterization of loss-dominated links can be generalized and simplified by means of a normalized link length as presented herein. Based on a correlation of this normalized length and observed eye opening, a novel assessment of wired digital links for frequencies up to 50GHz and data rates up to 30 Gb/s is proposed. It allows for an efficient prediction of the amount and type of required equalization for a given link as well as determining maximum tolerable loss for a given equalizer configuration. The proposed method and its applicability are demonstrated by means of practical examples.Publicationtype: Journal Article214 - Some of the metrics are blocked by yourconsent settings
Item type:Publication, Access status: without files , Exploration of differential via stub effect mitigation by using PAM4 and PAM8 line coding(IEEE, 2017-06-08); ; ; ; The use of spectrally efficient line codings is an important factor to facilitate high bitrates. By using PAM4 and PAM8 instead of PAM2 line coding the bandwidth of the signal is reduced considerably. On printed circuit boards vias are a major cause of signal distortion. Especially via stubs lead to resonances that degrade the transmission. By using higher order line codings with a lower fundamental frequency it is possible to operate the channel at higher data rates by keeping the fundamental frequency away from the stub resonances. In this work an extensive study using eye diagrams of differential links with via stubs is conducted to investigate the correlation of stub length and signaling performance using different line codings. It can be shown that, if the fundamental frequency of PAM2 approaches the stub notch frequency, PAM4 and PAM8 will in general improve the eye openings.Publicationtype: Conference Paper82 - Some of the metrics are blocked by yourconsent settings
Item type:Publication, Access status: without files , Efficient design of continuous time linear equalization for loss dominated digital linksSignal degradation in high-speed data links can be mitigated by means of channel equalization. One preferred choice in conjunction with other techniques is the Continuous Time Linear Equalizer (CTLE) due to its effectiveness. Although CTLE being common technology, adaptation of design parameters regularly relies on trial and error. This work proposes a simple, yet very effective method for CTLE design, referred to as matched CTLE (mCTLE). It advocates channel characterization in the frequency domain which is crucial for the placement of CTLE poles and zeros. Demonstration and discussion based on typical interconnect topologies illustrate the novel approach in the context of existing literature.Publicationtype: Conference Paper86 - Some of the metrics are blocked by yourconsent settings
Item type:Publication, Access status: without files , An Electronically Scannable Reflector Antenna Using a Planar Active Array Feed at Ka-BandThis contribution presents the system design procedure and performance of an array fed reflector antenna. Combining the inherent benefits of a reflector antenna - high gain, low-cost, and simplicity - with the agility provided by a scannable active array feed, enables a new range of applications, for instance in commercial mobile antenna terminals. The whole arrangement features a restricted field of view for either scanning or multibeam applications. To minimize system cost, a planar patch antenna array in printed circuit board technology is used for the feed and the reflector diameter is restricted to 60 cm. To obtain optimal performance, both the reflector and the feed are specifically designed for the desired application, i.e., mobile satellite communication at Ka-band. A comprehensive study of various rotationally symmetric reflectors is carried out to determine arrangements maximizing the field of view and still complying with the respective regulations. For the feed, a 30 GHz transmit array with 49 elements is developed, enabling 2-D scanning in a ±6° conical sector. It includes a wideband signal distribution network and frontend electronics.Publicationtype: Journal Article213 - Some of the metrics are blocked by yourconsent settings
Item type:Publication, Access status: without files , Redundant and non-redundant spectrum shaping schemes for reflection-limited chip-to-chip communicationIn today's chip-to-chip communication, the trend of high-speed transmission has led to ever growing bandwidth requirements. To cope with the resulting frequency-selective behavior of the transmission channel, conventional measures, such as digital equalization and error control coding, are undesired in this application scenario due to extremely tight power and latency constraints. Alternatively, this paper proposes different processing techniques of low complexity. They aim at matching spectrum of the transmit signal to the channel frequency response. For that purpose, two categories are investigated, namely pulse shaping and repetition coding. The performance of these schemes is assessed using two exemplary reflection-limited channel models, the multi-drop bus (MDB) channel and the substrate-integrated waveguides (SIW) channel. Simulations reveal a good performance of selected methods, such that, as a result, sets of suitable spectrum shaping schemes are presented for the respective transmission channels.Publicationtype: Conference Paper136 - Some of the metrics are blocked by yourconsent settings
Item type:Publication, Access status: without files , Efficient total crosstalk analysis of large via arrays in silicon interposers(2016-12-01); ; ; ; In this paper, we present for the first time a rigorous crosstalk analysis of through silicon via (TSV) arrays consisting of several hundreds of TSVs in interposers with metallized surfaces, using the physics-based via (PBV) modeling approach for applications up to 500 GHz. The PBV modeling approach is valid for complete and almost complete metallizations of the substrate where radial wave propagation in the parallel-plate structure dominates the electromagnetic properties and is utilized with models of good accuracy for localized and propagating fields in the inhomogeneous dielectrics. The approach shows very good to good agreement of crosstalk results for frequencies up to 500 GHz in comparison to full-wave simulations and attains a speedup of at least two orders of magnitude in comparison to general-purpose simulators. The definition of a weighted power sum for total uncorrelated crosstalk is applied for all channels in the TSV array. These power sum results give more meaningful insights into the global effects of the parameter variations than single crosstalk contributions. Based on variations of several technology and design parameters of TSVs, we derive quantitative estimations of the impact of these parameters on the total crosstalk.Publicationtype: Journal Article78 - Some of the metrics are blocked by yourconsent settings
Item type:Publication, Access status: without files , Modeling of differential striplines in segmented simulation of printed circuit board linksThe decomposition, i.e., segmentation, of multilayer printed circuit board links into constitutive parts by means of network parameter representations is widely accepted. This work examines implications of this procedure regarding differential links. For the first time, the physics-based single-ended stripline port is generalized to model coupled striplines in the environment of multilayer PCBs. Notably, results are general in nature and are not limited to the employed methods. The proposed approach allows for segmentation and computationally efficient simulation of links between very large via pin fields, where differential stripline pairs pose a common routing scheme. Its feasibility is validated using self-contained physics-based simulations as well as measurements and full-wave simulation results up to 40 GHz.Publicationtype: Conference Paper137