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Item type:Publication, Access status: without files , Integration of Double Barrier Memristor Die with Neuron ASIC for Neuromorphic Hardware Learning(IEEE, 2018-04-26); ; ; ; This paper details the design of an integrate fire (I F) neuron ASIC and its integration with a double barrier memristor device. The memristor has a non-volatile analog memory characteristic which changes with time and voltage. The neuron ASIC is designed to interact with the memristor by integrating its current and firing when a certain threshold is reached. The resulting spikes increase the memristor's conductance and consequently the firing rate of neuron increases. Together, the ASIC and the memristor mimics neuromorphic learning on hardware. The ASIC has been fabricated in AMS 350nm process.Publicationtype: Conference Paper186 - Some of the metrics are blocked by yourconsent settings
Item type:Publication, Access status: with files , An enhanced lumped element electrical model of a double barrier memristive device(IOP Publishing, 2017-04-13); ; ; ; The massive parallel approach of neuromorphic circuits leads to effective methods for solving complex problems. It has turned out that resistive switching devices with a continuous resistance range are potential candidates for such applications. These devices are memristive systems - nonlinear resistors with memory. They are fabricated in nanotechnology and hence parameter spread during fabrication may aggravate reproducible analyses. This issue makes simulation models of memristive devices worthwhile. Kinetic Monte-Carlo simulations based on a distributed model of the device can be used to understand the underlying physical and chemical phenomena. However, such simulations are very time-consuming and neither convenient for investigations of whole circuits nor for real-time applications, e.g. emulation purposes. Instead, a concentrated model of the device can be used for both fast simulations and real-time applications, respectively. We introduce an enhanced electrical model of a valence change mechanism (VCM) based double barrier memristive device (DBMD) with a continuous resistance range. This device consists of an ultra-thin memristive layer sandwiched between a tunnel barrier and a Schottky-contact. The introduced model leads to very fast simulations by using usual circuit simulation tools while maintaining physically meaningful parameters. Kinetic Monte-Carlo simulations based on a distributed model and experimental data have been utilized as references to verify the concentrated model.Publicationtype: Journal ArticleScopus© Citations 17 277 364 - Some of the metrics are blocked by yourconsent settings
Item type:Publication, Access status: without files , MemFlash device : floating gate transistors as memristive devices for neuromorphic computing(2014-10-01); ; ; Memristive devices are promising candidates for future non-volatile memory applications and mixed-signal circuits. In the field of neuromorphic engineering these devices are especially interesting to emulate neuronal functionality. Therefore, new materials and material combinations are currently investigated, which are often not compatible with Si-technology processes. The underlying mechanisms of the device often remain unclear and are paired with low device endurance and yield. These facts define the current most challenging development tasks towards a reliable memristive device technology. In this respect, the MemFlash concept is of particular interest. A MemFlash device results from a diode configuration wiring scheme of a floating gate transistor, which enables the persistent device resistance to be varied according to the history of the charge flow through the device. In this study, we investigate the scaling conditions of the floating gate oxide thickness with respect to possible applications in the field of neuromorphic engineering. We show that MemFlash cells exhibit essential features with respect to neuromorphic applications. In particular, cells with thin floating gate oxides show a limited synaptic weight growth together with low energy dissipation. MemFlash cells present an attractive alternative for state-of-art memresitive devices. The emulation of associative learning is discussed by implementing a single MemFlash cell in an analogue circuit.Publicationtype: Journal Article10 - Some of the metrics are blocked by yourconsent settings
Item type:Publication, Access status: without files , Memristive operation mode of floating gate transistors : a two-terminal MemFlash-cell(American Institute of Physics (AIP), 2012-12-24); ; ; A memristive operation mode of a single floating gate transistor is presented. The device resistance varied accordingly to the charge flow through the device. Hysteretic current-voltages including a resistance storage capability were observed. These experimental findings are theoretically supported by a capacitive based model. The presented two-terminal MemFlash-cell can be considered as a potential substitute for any memristive device (especially for reconfigurable logic, cross-bar arrays, and neuromorphic circuits) and is basically compatible with current Si-fabrication technology. The obvious trade-off between a memristive device based on a state-of-the-art silicon process technology and power consumption concerns will be discussed. © 2012 American Institute of Physics.Publicationtype: Journal Article14